About Me
Digital Design Engineer
Digital Design Engineer with 6+ years of experience designing SoCs. I got my bachelors degree in Electrical Engineering from the University of Washington in 2019 and have been working since. I was recently laid off from Infineon Technologies along with everyone at the Lynnwood, WA branch and am now looking to continue my career elsewhere. Open to relocation.
Things I Can Do
Expert in designing complex digital logic in Verilog/SystemVerilog.
Expert in key stages of digital design including definition, implementation, synthesis, timing, simulation, PPA, CDC, linting and DFT.
Expert in EDA tools including Design Compiler, Leda, QuestaSim, Tessent, 0-in and Formality.
Competent in version control tools including SVN and Git.
Competent in scripting languages including Python and TCL.
A Few Accomplishments
Delivered eight chip tape-outs while serving as lead designer for four IPs and contributing to four additional blocks.
Enabled scalable reuse across eight IPs within three chips by engineering a highly parameterizable ADC digital channel.
Validated market readiness by completing successful tape-outs, informing production designs, and supporting strategic automotive investments.